System-in-package module with memory
AssigneeEtron Technology, Inc.
InventorsWeng-Dah Ken, Chao-Chun Lu
Life of this patent
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Abstract
A system-in-package module with memory includes a non-memory chip, a substrate, and a memory chip. The non-memory chip has a first portion and a second portion. The substrate has a window and the substrate is electrically connected to the second portion of the non-memory chip. The memory chip is placed into the window of the substrate to electrically connect the first portion of the non-memory chip, and there is no direct metal connection between the memory chip and the substrate.
Claims8
A system-in-package (SIP) module with memory, the SIP module comprising:
- a cache memory;
- a memory controller;
- a memory;
- and
- a substrate, wherein the cache memory, the memory controller, and the memory are co-packaged over the substrate, and the cache memory and the memory controller are formed on a same semiconductor chip;
- wherein the memory controller accesses the memory and the cache memory through a first reconfigurable bus, transmits data to an external circuit or receives data from the external circuit through a second reconfigurable bus, and the memory controller is capable of dynamically changing at least one of a first swing voltage of the first reconfigurable bus and a second swing voltage of the second reconfigurable bus.
A system-in-package module with memory, the SIP module comprising:
- a non-memory chip having a first portion and a second portion, wherein the non-memory chip comprises a plurality of first electrical contacts and a plurality of second electrical contacts, and the plurality of first electrical contacts and the plurality of second electrical contacts are installed on the first portion and the second portion of the non-memory chip, respectively;
- a memory having a plurality of third electrical contacts installed on one side thereof;
- a substrate having a plurality of fourth electrical contacts installed on one side thereof and a plurality of fifth electrical contacts installed on another side thereof;
- and
- an additional memory covering the non-memory chip, the memory, and the substrate;
- wherein the plurality of first electrical contacts are electrically connected to the plurality of third electrical contacts to make the memory be electrically connected to the non-memory chip, the plurality of second electrical contacts are electrically connected to the plurality of fourth electrical contacts to make the substrate be electrically connected to the non-memory chip, and the substrate and the memory are both electrically connected to the same side of the non-memory chip or electrically connected to different sides of the non-memory chip;
- wherein there is no direct electrical connection between the memory and the substrate.
Dependencies are inferred from the claim text.