Shared memory with enhanced error correction

A method of detecting and correcting bit errors, comprising:

• performing a first decoding procedure regarding a serial unit of the encoded data to produce a decoded serial unit;
• determining the first decoding procedure regarding the serial unit was not successful;
• performing the first decoding procedure regarding a plurality of additional serial units of the encoded data to produce a plurality of additional decoded serial units, the serial unit and the plurality of additional serial units comprising a predefined grouping of the encoded data;
• and
• performing a second decoding procedure regarding a plurality of derivative units to produce a plurality of decoded derivative units, each successive bit in each of the plurality of derivative units correlated to a corresponding sequential position in the decoded serial unit and each of the decoded additional serial units, wherein the serial unit and the additional serial units each includes a predetermined quantity of sequential bits.

A computer program product for detecting and correcting bit errors, comprising:

• a non-transitory, computer-readable storage medium encoded with instructions adapted to be executed by a processor to implement:
• performing a first decoding procedure regarding a serial unit of the encoded data to produce a decoded serial unit;
• determining the first decoding procedure regarding the serial unit was not successful;
• performing the first decoding procedure regarding a plurality of additional serial units of the encoded data to produce a plurality of additional decoded serial units, the serial unit and the plurality of additional serial units comprising a predefined grouping of the encoded data;
• and
• performing a second decoding procedure regarding a plurality of derivative units to produce a plurality of decoded derivative units, each successive bit in each of the plurality of derivative units correlated to a corresponding sequential position in the decoded serial unit and each of the decoded additional serial units, wherein the serial unit and the additional serial units each includes a predetermined quantity of sequential bits.