Apparatus for overload recovery of an integrator in a sigma-delta modulator
AssigneeIntel IP Corporation
InventorsJohn G. KAUFFMAN, Krzysztof DUFRENE
Life of this patent
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Abstract
Described is an apparatus which comprises: a first integrator to receive an input signal and to generate a first output; a second integrator to receive the first output or a version of the first output and to generate a second output; and an analog-to-digital converter (ADC) to quantize the second output into a digital representation, the ADC including a detection circuit to detect an overload condition in the second output.
Claims35
An apparatus comprising:
- an amplifier having an input and an output;
- a capacitor coupled to the input and the output of the amplifier;
- an analog-to-digital converter (ADC) coupled to the output of the amplifier;
- a Digital-to-Analog converter (DAC) coupled to an output of the ADC and to the input of the amplifier;
- a circuitry coupled to the output of the ADC and the output of the DAC, wherein the delay circuitry is to compensate for an excess delay of at least a portion of a feedback path comprising the ADC.
An apparatus comprising:
- integrator having an input and an output;
- an analog-to-digital converter (ADC) coupled to the output of the integrator;
- a Digital-to-Analog converter (DAC) coupled to an output of the ADC and to the input of the integrator;
- circuitry coupled to the output of the ADC and the input of the integrator.
An apparatus comprising:
- means for integrating an analog input current and generating an analog output;
- means for converting the analog output to a corresponding digital output;
- means for converting the corresponding digital output to an analog current;
- means for compensating an excess delay associated with the means for converting the analog output, and for generating an output current;
- and
- means for summing the analog current with the analog input current and the output current.
An apparatus comprising:
- a first amplifier having an input and an output;
- a second amplifier having an input and an output;
- a resistor coupled to the output of the first amplifier and the input of the second amplifier;
- a first capacitor coupled to the input and the output of the first amplifier;
- a second capacitor coupled to the input and the output of the second amplifier;
- a analog-to-digital converter coupled to the output of the second amplifier;
- a digital-to-analog converter coupled to an output of the flash analog-to-digital converter, wherein an output of the digital-to-analog converter is coupled to the input of the first amplifier;
- and
- a compensation circuit having an input coupled to the output of the analog-to-digital converter, wherein the compensation circuit has an output coupled to the input of the first amplifier.
A communication device comprising:
- an antenna;
- a low noise amplifier coupled to the antenna;
- a first mixer coupled to an output of the low noise amplifier;
- a first filter coupled to the output of the first mixer;
- and
- a first sigma-delta modulator with an excess delay compensation circuitry, wherein the first sigma-delta modulator is coupled to the first filter.
An apparatus comprising:
- an integrator to integrate an analog input current and for generating an analog output;
- a analog-to-digital converter to convert the analog output to a corresponding digital output;
- a digital-to-analog converter to convert the corresponding digital output to an analog current;
- circuit for compensating excess delay associated with the analog-to digital converter, wherein the circuit is to generate an output current;
- and
- a node for summing the analog current with the analog input current and the output current.
An apparatus comprising:
- an amplifier having an input and an output;
- a capacitor coupled to the input and the output of the amplifier;
- an analog-to-digital converter (ADC) coupled to the output of the amplifier;
- a Digital-to-Analog converter (DAC) coupled to an output of the ADC and to the input of the amplifier;
- a circuitry coupled to the output of the ADC and the input of the amplifier, wherein the delay circuitry is to compensate for an excess delay of at least a portion of a feedback path comprising the ADC.
A method comprising:
- integrating an analog input current and generating an analog output;
- converting the analog output to a corresponding digital output;
- converting the corresponding digital output to an analog current;
- compensating an excess delay associated with the means for converting the analog output, and generating an output current as a result of compensating;
- and
- summing the analog current with the analog input current and the output current.
Dependencies are inferred from the claim text.