US 2017/0288682 A1 · CLOCK SIGNAL AND SUPPLY VOLTAGE VARIATION TRACKING

Abstract

Embodiments disclosed herein provide an apparatus comprising a clock generation circuit configured to generate a first signal for a first time period and a second signal for a second time period, a charge pump circuit coupled to the clock generation circuit and configured to generate a first voltage and a second voltage based, at least in part, on the first time period and the second time period, and a comparison circuit coupled to the charge pump circuit, the comparison circuit configured to compare a difference between the first voltage and the second voltage with a threshold value and generate an active tracking enablement signal in response to determining that the difference between the first and second voltages exceeds the threshold value.

Claims16

Dependent claims

An apparatus comprising:

a first tracking enablement circuit configured to enable a delay-locked loop tracking circuit based on a variation in a voltage output of a voltage source, a variation in a frequency of an input dock signal, or combinations thereof;
and
a second tracking enablement circuit configured to enable a duty cycle correction circuit based on a variation in a duty cycle of the input clock signal.

An apparatus comprising:

a first circuit configured, when enabled, to perform a delay locked loop (DLL) operation;
a second circuit configured, when enabled, to perform a duty cycle correction (DCC) operation;
a first tracking enablement circuit configured to produce a first voltage based on a signal related to the DLL operation, the first tracking enablement circuit being further configured to enable the first circuit when a variation of the first voltage exceeds a first threshold value;
and
a second tracking enablement circuit configured to produce a second voltage based on a signal related to the DCC operation, the second tracking enablement circuit being further configured to enable the second circuit when a variation of the second voltage exceeds a second threshold value.

2 more elements

A method comprising:

enabling, responsive to assertion of a first active signal, a first circuit to allow the first circuit to perform a delay locked loop (DLL) operation;
enabling, responsive to assertion of a second active signal, a second circuit to allow the second circuit to perform a duty cycle correction (DCC) operation;
producing a first voltage based on a signal related to the DLL operation;
producing a second voltage based on a signal related to the DCC operation;
asserting the first active signal when a variation of the first voltage exceeds a first threshold value;
and
asserting the second active signal when a variation of the second voltage exceeds a second threshold value.

4 more elements

Dependencies are inferred from the claim text.

Facts

Application

15/628,260Filed 20 Jun 2017

Priority

10 Jun 2015

Published

5 Oct 2017

Term ends

Not estimatedThe source records don’t support an estimate.

Classification7 codes

H03L 7/0802
Details of the phase-locked loop: the loop being adapted for reducing power consumption
H03K 5/1565
Arrangements in which a continuous pulse train is transformed into a train having a desired pattern: the output pulses having a constant duty cycle
H03L 1/00
Stabilisation of generator output against variations of physical values
H03L 7/0812
Provided with an additional controlled phase shifter: and where no voltage or current controlled oscillator is used

Clock signal and supply voltage variation tracking

Life of this patent

Clock signal and supply voltage variation tracking

Life of this patent

Abstract

Claims16