Hum generation using representative circuitry

A computer-implemented method for circuit analysis comprising:

• obtaining a description of a plurality of representative logic circuits;
• simulating the plurality of representative logic circuits;
• determining a first representative logic circuit that is a longest delay path from the plurality of representative logic circuits;
• and
• incorporating the longest delay path from the plurality of representative logic circuits as a timing circuit to generate a synchronization signal used in a hum fabric.

A computer program product embodied in a non-transitory computer readable medium for implementation of a logical calculation apparatus comprising:

• code for obtaining a description of a plurality of representative logic circuits;
• code for simulating the plurality of representative logic circuits;
• code for determining a first representative logic circuit that is a longest delay path from the plurality of representative logic circuits;
• and
• code for incorporating the longest delay path from the plurality of representative logic circuits as a timing circuit to generate a synchronization signal used in a hum fabric.