Arbitrary Delay Buffer

The apparatus of claim 3, wherein

• the edge detector comprises a rising edge detector that detects a rising edge of the input signal and a falling edge detector that detects a falling edge of the input signal;
• the ring oscillator comprises a first ring oscillator that oscillates in response to the detected rising edge and a second ring oscillator that oscillates in response to the detected falling edge;
• and
• the counter comprises a first counter that counts a number of oscillations of the first ring oscillator and generates a first delay signal when the count reaches a first delay count and a second counter that counts the number of oscillations of the second ring oscillator and generates a second delay signal when the count reaches a second delay count.

An apparatus comprising:

• a digital delay configured to receive an input signal;
• and
• an analog delay configured to selectively receive, based on a selection signal, one of the input signal and an output of the digital delay,
• wherein the selection signal selects between application of one and both the analog delay and the digital delay to the input signal.