US 2017/0288623 A1Published application

Current reuse amplifier

AssigneeSumitomo Electric Industries, Ltd.

InventorsSeiji Fujita, Tsuneo Tokumitsu

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Abstract

A two-stage amplifier of a type of the current re-use configuration is disclosed. The amplifier includes first to third transistors, where the first transistor constitute the first stage, while, the latter two transistors constitute the second stance. The first to third transistors are connected in series between a power supply and ground such that a bias current supplied to the third transistor flows in the second and first transistors. The first transistor in the source thereof is grounded in the DC mode. The second transistor is grounded in the AC mode but floated in the DC mode. The third transistor that outputs an amplified signal is connected in parallel in the AC mode but in series in the DC mode with respect to the second transistor.

Claims15

Dependent claims

An amplifier that includes an upstream stage, a downstream stage and an intermediate node between the upstream stage and the downstream stage, the amplifier comprising:

a first transistor in the upstream stage, the first transistor including a control terminal and two current terminals, the control terminal receiving an input signal, one of the two current terminals being coupled to a ground and another of the two current terminals being connected to the intermediate node;
a second transistor in the downstream stage, the second transistor including a control terminal and two current terminals, the control terminal of the second transistor being coupled with the intermediate node, one of the two current terminals of the second transistor being grounded in an AC mode but floated in a DC mode;
a third transistor in the downstream stage, the third transistor including a control terminal and two current terminals, the control terminal of the third transistor being coupled with the intermediate node, one of the two current terminals of the third transistor being coupled with another of the two current terminals of the second transistor and another of the two current terminals of the third transistor outputting an output signal;
and
a distributed transmission line connected between the another of the two current terminals of the second transistor and the one of the two current terminals of the third transistor,
wherein the third transistor is connected in series in the DC mode but in parallel in the AC mode with respect to the second transistor.

3 more elements

An amplifier of a type of a current re-use configuration, comprising:

an upstream stage amplifier that receives an input signal and outputs an amplified signal, the upstream stage being grounded in a direct current (DC) mode and an alternating current (AC) mode;
a downstream stage that receive the amplified signal and outputs an output signal, the downstream stage being grounded in the AC mode but floated in the DC mode;
and
a power supply that provides a bias current directly to the downstream stage but indirectly to the upstream stage through the downstream stage,
wherein the downstream stage includes two transistors and a distributed transmission line provided between the two transistors, one of the two transistors being connected to the power supply and another of the two transistors being connected to the upstream stage, the two transistors commonly receiving the amplified signal output from the upstream stage, the two transistors being connected in parallel in the AC mode but in series in the DC mode as sandwiching the distributed transmission line therebetween.

2 more elements

Dependencies are inferred from the claim text.

Facts

Application: 15/473,023Filed 29 Mar 2017
Priority: JP 2016-06946030 Mar 2016
Published: 5 Oct 2017
Term ends: Not estimatedThe source records don’t support an estimate.

Classification6 codes

H03F 3/601
Amplifiers in which coupling networks have distributed constants, e.g. with waveguide resonators: using FET's, e.g. GaAs FET's
H03F 1/0205
Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation: in transistor amplifiers
H03F 3/193
With semiconductor devices only: with field-effect devices
H03F 2200/411
Indexing scheme relating to amplifiers: the output amplifying stage of an amplifier comprising two power stages

Family

US 10,090,816 B2Related patent
US 2017/0288623 A1This patent

From the US filing history. Foreign family members aren’t listed.

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