Double Balanced Mixer

A double balanced mixer, including:

• (a) a four-node field effect transistor (FET) ring including four branches, each branch including at least one FET having a source, a drain, and a gate, wherein the source of each FET is connected to the drain of a next FET in the four-node FET ring and the gate and the drain of each FET are connected together as a diode having close to a zero turn-on voltage;
• (b) a first balun having an unbalanced side configured to pass a local oscillator (LO) signal and a pair of ports on a balanced side coupled to a corresponding pair of first opposing nodes of the four-node FET ring;
• (c) a second balun having an unbalanced side configured to pass a radio frequency (RF) signal and a pair of ports on a balanced side coupled through corresponding capacitors to a corresponding pair of second opposing nodes of the four-node FET ring;
• and
• (d) an intermediate frequency (IF) signal port coupled through corresponding quarter-wave isolation elements to the second opposing nodes of the four-node FET ring.

A method for fabricating a double balanced mixer, including:

• (a) providing a four-node field effect transistor (FET) ring including four branches, each branch including at least one FET having a source, a drain, and a gate;
• (b) configuring the source of each FET to be connected to the drain of a next FET in the four-node FET ring;
• (c) configuring each FET as a diode having close to a zero turn-on voltage by connecting the drain of such FET to the gate of such FET;
• (d) providing a first balun having an unbalanced side configured to pass a local oscillator (LO) signal and a pair of ports on a balanced side coupled to a corresponding pair of first opposing nodes of the four-node FET ring;
• (e) providing a second balun having an unbalanced side configured to pass a radio frequency (RF) signal and a pair of ports on a balanced side coupled through corresponding capacitors to a corresponding pair of second opposing nodes of the four-node FET ring;
• and
• (f) providing an intermediate frequency (IF) signal port coupled through corresponding quarter-wave isolation elements to the second opposing nodes of the four-node FET ring.