Semiconductor memory devices and methods for fabricating the same

A semiconductor memory device comprising:

• a gate stack including at least one lower non-memory gate, a plurality of memory gates, and at least one upper non-memory gate that are vertically stacked on a substrate;
• an upper channel vertically penetrating the at least one upper non-memory gate and the plurality of memory gates;
• a lower channel vertically penetrating the at least one lower non-memory gate;
• and
• a memory layer provided between the upper channel and the at least one upper non-memory gate and between the upper channel and the plurality of memory gates,
• wherein the memory layer has an L-shaped bottom end portion contacting the lower channel, and
• wherein the upper channel extends along the memory layer and a top surface of the lower channel and has a uniform thickness.

A method for fabricating a semiconductor memory device, the method comprising:

• forming a channel hole vertically penetrating a plurality of layers stacked on a substrate, the channel hole exposing the substrate;
• forming a lower channel partially filling the channel hole;
• forming a memory layer extending along an inner sidewall of the channel hole and a top surface of the lower channel;
• forming a spacer vertically extending along an the inner sidewall of the channel hole on the memory layer;
• etching the memory layer to expose a portion of the top surface of the lower channel by an etching process using the spacer as an etch mask;
• removing the spacer to expose the memory layer;
• and
• forming an upper channel extending along the exposed memory layer and the exposed portion of the top surface of the lower channel.