Cobalt-containing conductive layers for control gate electrodes in a memory structure

A method of manufacturing a three-dimensional memory device, comprising:

• forming a stack of alternating layers comprising insulator layers and sacrificial material layers over a substrate;
• forming an opening through the stack;
• forming a blocking dielectric at a periphery of the opening;
• forming at least one charge storage element over the blocking dielectric;
• forming a tunneling dielectric over the at least one charge storage element;
• forming a semiconductor channel over the tunneling dielectric in the opening;
• forming backside recesses around the blocking dielectric by removing the sacrificial material layers;
• and
• forming electrically conductive layers within the backside recesses, wherein each of the electrically conductive layers is formed by depositing at least a cobalt portion within a respective backside recess.

The method of claim 42, wherein:

• the device region comprises:
• a plurality of semiconductor channels, wherein at least one end portion of each of the plurality of semiconductor channels extends substantially perpendicular to a top surface of the substrate;
• a plurality of charge storage regions, each charge storage region located adjacent to a respective one of the plurality of semiconductor channels;
• and
• a plurality of control gate electrodes having a strip shape extending substantially parallel to the top surface of the substrate;
• the plurality of control gate electrodes comprise at least a first control gate electrode located in a first device level and a second control gate electrode located in a second device level;
• the electrically conductive layers in the stack are in electrical contact with the plurality of control gate electrode and extend from the device region to a contact region including the plurality of electrically conductive via connections;
• and
• the substrate comprises a silicon substrate containing a driver circuit for the NAND device.

A three-dimensional memory device comprising:

• a stack of alternating layers comprising insulator layers and electrically conductive layers and located over a substrate;
• a memory opening extending through the stack;
• and
• a memory film and a semiconductor channel located within the memory opening, wherein each of the electrically conductive layers comprises at least a cobalt portion.