Static random access memory (sram) device
AssigneeRenesas Electronics Corporation
InventorKiyotada FUNANE
Life of this patent
Estimating the term…
Abstract
To reinforce power supply wirings without sacrificing the interconnectivity of semiconductor devices. When three wirings are formed in parallel in the same wiring layer and the center wiring among them is shorter than the outer wirings, a projecting portion integrated into the outer wiring is formed utilizing a free space remaining on the extension of the center wiring. For example, when the outer wirings are used as power supply wirings, the power supply wirings can be reinforced by adding the projecting portion. At this time, because the projecting portion is arranged in the free space, the interconnectivity is not sacrificed.
Claims14
A Static Random Access Memory (SRAM) device, comprising:
- a memory cell arranged in a first wiring layer;
- a first wiring arranged in a second wiring layer;
- a second wiring arranged in the second wiring layer;
- a third wiring arranged in the second wiring layer between the first and second wirings;
- a first projecting portion integrally formed with the first wiring between the first and second wirings in the second wiring layer;
- a fourth wiring arranged in a third wiring layer, the fourth wiring intersecting with the first wiring and the first projecting portion;
- a first via coupled between the first wiring and the fourth wiring;
- and
- a second via coupled between the first projecting portion and the fourth wiring,
- wherein the first via is formed on a portion on the first wiring that is adjacent to the first projecting portion such the first via and the second via are adjacent to each other,
- wherein the third wiring is arranged between the first wiring and the second wiring in a first region, and
- wherein the first wiring has the first projecting portion in a second region.
The SRAM device of claim 12,
- wherein the memory cell is arranged between the fifth N-channel transistor and the sixth N-channel transistor.
A Static Random Access Memory (SRAM) device, comprising:
- a memory cell arranged in a first wiring layer;
- a first wiring arranged in a second wiring layer;
- a second wiring arranged in the second wiring layer;
- a third wiring arranged in the second wiring layer between the first and second wirings;
- a first projecting portion integrally formed with the first wiring between the first and second wirings in the second wiring layer;
- a fourth wiring arranged in a third wiring layer, the fourth wiring intersecting with the first wiring and the first projecting portion;
- a first via coupled between the first wiring and the fourth wiring;
- and
- a second via coupled between the first projecting portion and the fourth wiring,
- wherein a width of the first wiring or the second wiring is larger than a width of the third wiring.
Dependencies are inferred from the claim text.