Semiconductor device and method of manufacturing a semiconductor device
AssigneeSii Semiconductor Corporation
InventorsTakeshi MORITA, Kazuhiro TSUMURA
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AssigneeSii Semiconductor Corporation
InventorsTakeshi MORITA, Kazuhiro TSUMURA
Estimating the term…
In a semiconductor device that uses an N-channel MOS transistor as an electrostatic protection element, the N-channel MOS transistor has a plurality of electric field relaxing areas, three of which have in a longitudinal direction three different impurity concentrations decreasing from an N-type high concentration drain region downward, and three of which have in a lateral direction three different impurity concentrations decreasing from the N-type high concentration drain region toward a channel region. An electric field relaxing area that is in contact with the electric field relaxing areas in the longitudinal direction and with the electric field relaxing areas in the lateral direction has the lowest impurity concentration.
A semiconductor device comprising an N-channel MOS transistor, the N-channel MOS transistor comprising:
A method of manufacturing a semiconductor device that comprises an N-channel MOS transistor, the N-channel MOS transistor comprising:
Dependencies are inferred from the claim text.