Thin stack packages
AssigneeSK hynix Inc.
InventorSang Yong LEE
Life of this patent
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Abstract
The stack package includes a substrate body layer having a top surface and a bottom surface, first circuit patterns disposed on the bottom surface of the substrate body layer, second circuit patterns disposed on the top surface of the substrate body layer, a first semiconductor chip including first bumps, and a second semiconductor chip including second bumps. The first bumps extend through the substrate body layer to be electrically coupled to the first circuit patterns, and the second bumps extend past sidewalls of the first semiconductor chip to be electrically coupled to the second circuit patterns. The second semiconductor chip is stacked on the first semiconductor chip.
Claims10
A stack package comprising:
- a substrate body layer;
- first circuit patterns disposed on a second surface of the substrate body layer;
- second circuit patterns disposed on a first surface of the substrate body layer opposite to the second surface;
- a first semiconductor chip disposed over the first surface of the substrate body layer;
- a first bump having a first length longer than a first thickness of the substrate body layer, the first bump formed on the first semiconductor chip and penetrating thorough the substrate body layer to be electrically coupled to the first circuit patterns;
- and
- a second semiconductor chip disposed over the first semiconductor chip;
- a protection layer on the first surface of the substrate body layer to cover the first and second semiconductor chips;
- and
- a second bump having a second length longer than a second thickness of the first semiconductor chip, the second bumps formed on the second semiconductor chip and penetrating a portion of the protection layer such that sides of the second bump are in contact with the protection layer to be electrically coupled to the second circuit patterns.
Dependencies are inferred from the claim text.