Bumpless wafer level fan-out package

An integrated circuit package, comprising:

• an interposer substrate having a surface, the interposer substrate having a plurality of conductive pads on the surface;
• an integrated circuit die having front and back surfaces, wherein the integrated circuit die is mounted on the interposer substrate, and wherein the front surface of the integrated circuit die faces the interposer substrate;
• a plurality of contact pads formed on the front surface of the integrated circuit die, each of which makes direct physical contact with a corresponding conductive pad in the plurality of conductive pads;
• and
• a continuous package substrate having a continuous wall comprising substantially the same material that surrounds surrounding the interposer substrate and the integrated circuit die.

A method of fabricating an integrated circuit package, comprising:

• forming a first plurality of conductive pads on an interposer substrate;
• forming a second plurality of conductive pads on an integrated circuit die;
• assembling the integrated circuit die on the interposer substrate so that each conductive pad in the second plurality of conductive pads makes direct physical contact with a corresponding conductive pad in the first plurality of conductive pads;
• and
• embedding the integrated circuit die and the interposer substrate in a continuous package substrate to form the integrated circuit package, wherein the integrated circuit die and the interposer are surrounded by a continuous wall of the continuous package substrate, comprising substantially the same material.