Semiconductor Substrate with Stress Relief Regions

A method of forming a compound semiconductor substrate, comprising:

• providing a crystalline base substrate comprising a first semiconductor material and having a main surface;
• forming a first semiconductor layer on the main surface and comprising a pair of tracks disposed on either side of active device regions, the first semiconductor layer being formed from a second semiconductor material having a different coefficient of thermal expansion than the first semiconductor material, the pair of tracks having a relatively weaker crystalline structure than the active device regions;
• and
• thermally cycling the base substrate and the first semiconductor layer such that the first semiconductor layer expands and contracts at a different rate than the base substrate,
• wherein the pair of tracks physically decouple adjacent ones of the active device regions during the thermal cycling.

A compound semiconductor substrate, comprising:

• a crystalline base substrate comprising:
• a first region that extends to a main surface of the base substrate and has a crystalline structure that is damaged and a second region that is adjacent the first region and has a crystalline structure that is undamaged;
• and
• a first semiconductor layer formed on the main surface and comprising a third region covering the first region of the base substrate and a fourth region of covering the second region of the base substrate, the third region having a crystalline structure that is disorganized relative to a crystalline structure of the fourth region,
• wherein the base substrate has a different coefficient of thermal expansion than the first semiconductor layer.