Semiconductor memory device and operating method thereof with a connection control transistor operation voltage adjusted

A semiconductor memory device comprising:

• a plurality of strings including a plurality of memory cells coupled in series between a bit line and a source line;
• a peripheral circuit suitable for performing a program operation by applying to the plurality of strings a program voltage, a pass voltage, and a connection control transistor operation voltage;
• and
• a control logic suitable for controlling the peripheral circuit to perform the program operation,
• wherein the control logic adjusts a potential level of the connection control transistor operation voltage according to a program order of a selected memory cell among the plurality of memory cells, and
• wherein each of the plurality of strings comprises:
• the plurality of memory cells vertically stacked along a U-shaped channel layer;
• a drain select transistor and a source select transistor provided on both ends of the U-shaped channel layer, respectively;
• and
• a connection control transistor arranged at a lowermost portion of the U-shaped channel layer and controlled by the connection control transistor operation voltage.

A method of operating a semiconductor memory device comprising a plurality of strings including a plurality of drain-side memory cells and a plurality of source-side memory cells vertically stacked along a U-shaped channel layer, a drain select transistor and a source select transistor provided on both ends of the U-shaped channel layer, respectively, and a connection control transistor provided at a lowermost portion of the U-shaped channel layer, the method comprising:

• setting a potential level of a connection control transistor operation voltage according to positions of selected memory cells, to which a program voltage is applied among the plurality of drain-side memory cells and the plurality of source-side memory cells;
• applying the set connection control transistor operation voltage to the connection control transistor;
• and
• performing a program operation to the selected memory cells by applying the program voltage to the selected memory cells and applying a pass voltage to the other memory cells.