Memristor-based processor integrating computing and memory and method for using the processor

A processor, comprising:

• a computing and memory structure comprising X in number integration units and s, the integration units being computing and memory units (CMUs), each computing and memory unit (CMU) being connected to a corresponding communication unit, and the X in number communication units being mutually connected to form a communication network;
• and
• a control unit, being configured to produce control signals according to commands, connect communication networks between the CMUs, choose operand addresses and result storage addresses, and search for one or a plurality of idle CMUs when extra CMUs are required for an operation;
• wherein
• each computing and memory unit comprises M in number bit units and M−1 in number vertical line switches;
• the M in number bit units comprise M in number bit lines which are all connected to one communication unit;
• and a vertical line switch, if exists, is arranged between bit line ends of two adjacent bit units;
• each bit unit comprises a resistor, a horizontal line switch and N in number memristors;
• one end of a first memristor serves as a first selection line and the other end of the first memristor is grounded via a horizontal line switch and a resistor in series;
• one end of a second memristor serves as a second selection line and the other end of the second memristor is connected to the other end of the first memristor;
• one end of a third memristor serves as a third selection line and the other end of the third memristor is connected to the other end of the second memristor . . . one end of a Nth memristor serves as a Nth selection line and the other end of the Nth memristor is connected to the other end of a N−1th memristor;
• and
• X is a positive integer greater than or equal to 2;
• M is a positive integer greater than or equal to 1;
• and N is a positive integer greater than or equal to 1.