Apparatuses and methods for compensating for process, voltage, and temperature variation in a memory

An apparatus comprising:

• an output driver circuit configured to provide a data output signal;
• a pre-driver circuit configured to provide pre-driver signals to the output driver circuit;
• and
• a reference generator circuit configured to provide pre-driver reference signals to the pre-driver circuit, the reference generator circuit including first set of transistors and a second set of transistors, wherein the first set of transistors are in a cascode arrangement with the second set of transistors.

An apparatus comprising:

• an output driver circuit configured to provide a data output signal;
• a reference generator circuit configured to provide first and second pre-driver reference signals and
• a pre-driver circuit configured to provide first and second pre-driver signals to the output driver circuit, the pre-driver circuit comprising:
• a first level shifter circuit configured to receive first data and provide a first level shifted output signal;
• a first pre-driver inverter circuit coupled to the first level shifter circuit and configured to provide the first pre-driver signal responsive to the first level shifted output signal;
• a second level shifter circuit configured to receive a complement of the first data and provide a second level shifted output signal;
• and
• a second pre-driver inverter circuit coupled to the second level shifter circuit and configured to provide the second pre-driver signal responsive to the second level shifted output signal

An apparatus, comprising:

• a reference generator circuit configured to provide a plurality o reference signals, the reference generator circuit includes first and second sets of transistors, wherein a trim voltage signal is provided to the first set of transistors and a reference voltage signal is provided to the second set of transistors, wherein the trim voltage signal includes a plurality of signals and each signal of the plurality of signals is provided to a respective one of first set of transistors;
• a pre-driver circuit configured to provide a plurality of control signals responsive to receipt of the plurality of reference signals and a plurality of data signals;
• and
• an output driver circuit configured provide an output data signal responsive to receipt of the plurality of control signals.