US 2017/0287432 A1 · DISPLAY DEVICE

Abstract

A display device includes a display panel having a plurality of pixels respectively connected to a plurality of gate lines and a plurality of data lines, a gate driving circuit that outputs a plurality of gate signals to the plurality of gate lines, and a data driving circuit configured that outputs a plurality of data signals for driving the plurality of data lines. Each of the plurality of pixels includes a first sub-pixel configured to receive a corresponding data signal among the plurality of data signals in response to a first gate signal among the plurality of gate signals, and a second sub-pixel configured to receive a corresponding data signal among the plurality of data signals in response to the first gate signal, and reduce a voltage of the received data signal in response to a second gate signal among the plurality of gate signals. The second gate signal is a signal delayed by a 2×d×H time relative to the first gate signal (where each of d and H is a positive integer, H is a horizontal period, and d×H is a pulse width of first and second gate signals).

Claims19

Dependent claims

A display device comprising:

a display panel comprising a plurality of pixels respectively connected to a plurality of gate lines and a plurality of data lines;
a gate driving circuit configured to generate a plurality of gate signals to the plurality of gate lines;
and
a data driving circuit configured to generate a plurality of data signals to drive the plurality of data lines,
wherein each of the plurality of pixels comprises at least two sub-pixels in which a first sub-pixel is configured to receive a corresponding data signal among the plurality of data signals in response to a first gate signal output by the gate driving circuit, and a second sub-pixel is configured to receive a corresponding data signal among the plurality of data signals in response to the first gate signal, and reduce a voltage of the received data signal in response to a second gate signal output by the gate driving circuit,
wherein the second gate signal is delayed by a 2×d×H time relative to the first gate signal, where d and H are positive integers, H is a horizontal period, and d×H is a pulse width of the first gate signal and the second gate signal.

3 more elements

A display device comprising:

a display panel comprising a plurality of pixels respectively connected to a plurality of gate lines and a plurality of data lines;
a gate driving circuit configured to generate a plurality of gate signals output to the plurality of gate lines and outputs a plurality of carry signals corresponding to the plurality of gate signals;
and
a data driving circuit configured to generate a plurality of data signals for driving the plurality of data lines,
wherein each of the plurality of pixels comprises:
a first sub-pixel configured to receive a corresponding data signal among the plurality of data signals in response to a corresponding first gate signal among the plurality of gate signals;
and
a second sub-pixel configured to receive a corresponding data signal among the plurality of data signals in response to the first gate signal, and reduce a voltage of the received data signal in response to a first carry signal corresponding to the first gate signal among the plurality of carry signals.

5 more elements

A display panel comprising:

a display panel comprising a plurality of pixels respectively connected to a plurality of gate lines to output respective gate signals and a plurality of data lines to output respective data signals, and in which each pixel is comprised of at least a first sub-pixel and a second sub-pixel that face each other with a first gate line arranged therebetween;
the first sub-pixel is configured to receive a corresponding data signal among a plurality of data signals in response to a first gate signal through the first gate line, and the second sub-pixel configured to receive a corresponding data signal among the plurality of data signals in response to the first gate signal, and reduce a voltage of the received data signal in response to a second gate signal received through a second gate line.

Dependencies are inferred from the claim text.

Display device

Life of this patent

Display device

Life of this patent

Abstract

Claims19