Sensor bus communication system

An apparatus comprising:

• a host-protocol transceiver coupled to a host-protocol input/output (IO) interface comprising a serial data bus;
• a first guest-protocol transceiver coupled to a first guest-protocol input/output (IO) interface comprising a serial data bus;
• and
• a second guest-protocol transceiver coupled to a second guest-protocol input/output (IO) interface,
• wherein the serial data bus of the host-protocol IO interface is operable at a first frequency, and the serial data bus of the first guest-protocol IO interface is operable at a second frequency, the first frequency being greater than the second frequency;
• and
• wherein the host-protocol IO interface is operable at a first high-voltage level, and the first guest-protocol IO interface is operable at a second high-voltage level, the second high-voltage level being greater than the first high-voltage level.

A system comprising a memory, a processor coupled to the memory, and a wireless interface for allowing the processor to communicate with another device, the processor and a repeater including:

• a first circuitry comprising a first input/output (IO) interface;
• a second circuitry comprising a second input/output (IO) interface;
• and
• a datapath circuitry coupled to the first circuitry and the second circuitry,
• wherein the second circuitry is to convert a transaction received on the second IO interface into a transaction for the first IO interface, and to convert a transaction received on the first IO interface into a transaction for the second IO interface;
• and
• wherein the first IO interface comprises a serial data bus which is operable at a first frequency, and the second IO interface comprises a serial data bus which is operable at a second frequency, the first frequency being greater than the second frequency.