Differential bus receiver

A method comprising:

• receiving a first input current, a second input current, and a common mode current at a bus receiver including a four-quadrant input circuit;
• compensating, using the four-quadrant input circuit, the first input current and the second input current based on the received common mode current;
• generating as an output from the four-quadrant input circuit a first differential voltage based on a difference in the current flows between the first input current and the second input current;
• generating as an output from the four-quadrant input circuit a second differential voltage based on the difference in the current flows between the first input current and the second input current;
• generating a first output current based on the first differential voltage;
• generating a second output current based on the second differential voltage;
• generating, at a summed current output node, a summed current output comprising the first output current and the second output current, wherein the summed current is representative of the difference in the current flows between the first input current and the second input current.

A system comprising:

• a bus receiver comprising a four-quadrant input circuit, the four-quadrant input circuit including a first current input and a second current input;
• wherein the four-quadrant input circuit is configured to receive a first current at the first current input, receive a second current at the second input, and output a first differential voltage and a second differential voltage based on a difference in current flows between the first current and the second current, the first differential voltage and the second differential voltage compensated for a common mode current;
• an active gain input stage coupled to the four-quadrant input circuit, the active gain input stage comprising a first input coupled to a voltage input differential circuit;
• a second input coupled to a biasing circuit operable to provide biasing to control biasing of a plurality of output semiconductors controlling a plurality of outputs of the four-quadrant input circuit;
• a first active gain stage output coupled to the common mode biasing circuit;
• and a second active gain stage output coupled to the common mode biasing circuit,
• wherein the active gain stage is operable to provide common mode current compensation by driving, using the first active gain output, the common mode biasing circuit to allow current to be provided to the first current input and the second current input when a negative common mode current exists at the first current input and the second current input;
• and provide common mode current compensation by driving, using the second active gain output, the common mode biasing circuit to allow current to be sunk from the first current input and from the second current input when a positive common mode current exists at the first current input and the second current input.