Repetitive address indirection in a memory

A method, comprising:

• receiving a plurality of write operations directed to logical addresses of a non-volatile memory;
• and
• writing data of received write operations to physical addresses in the memory, said writing including repetitively redirecting the writing of write data of the plurality of write operations to physical addresses in the memory in a circular sequence of physical addresses of the memory, wherein for each received write operation of the plurality of write operations, the writing of data includes:
• selecting a next-in-sequence physical address of the circular sequence;
• performing a write operation at a selected physical address;
• mapping the logical address to a selected physical address;
• and
• if a selected physical address is an ending address of the circular sequence, restarting the circular sequence so that the next-in-sequence physical address to be selected is a beginning physical address of the circular sequence of physical addresses.

A computing system, comprising:

• a memory;
• and
• a processor configured to cause a data write into or data read from the memory;
• wherein the memory is a non-volatile memory, said memory including:
• a plurality of memory locations, each memory location configured to store data and having a physical address;
• and
• repetitive address indirection control logic configured to receive a plurality of write operations for writing data to logical addresses of the memory, and further configured to repetitively redirect the writing of write data of the write operations to physical addresses in the memory in a circular sequence of physical addresses of the memory independently of logical addresses of the write operations, said repetitive address indirection control logic including:
• circular sequential address redirection logic configured to, for every received write operation of the plurality of write operations, select a next-in-sequence physical address of the circular sequence of physical addresses of the memory, and perform the received write operation at the selected next-in-sequence physical address, wherein the circular sequence of physical addresses starts at a beginning physical address of the circular sequence, ends at an ending physical address of the circular sequence of physical addresses and includes physical addresses intermediate the beginning and ending physical addresses of the circular sequence;
• and
• circular sequential address mapping logic configured to map a logical address of each received write operation to the selected next-in-sequence physical address;
• and
• wherein the circular sequential address redirection logic is further configured to, if a selected next-in-sequence physical address is the ending physical address of the circular sequence of physical addresses, restart the circular sequence of physical addresses so that the next-in-sequence physical address to be selected is the beginning physical address of the circular sequence of physical addresses.