Energy efficient read/write support for a protected memory

A data storage system comprising:

• a memory controller comprising logic to:
• read K bits of M bits of data from memory and D error detection bits from the memory;
• perform a partial read, write, or modify (RWM) operation on the K bits of the M bits of written data, wherein K, M and D are positive integers;
• determine whether an error is present on the K bits of the M bits of written data according to the D error detection bits, wherein the D error detection bits correspond to the K bits of the M bits of written data;
• and
• execute a correction operation to correct the error on the K bits of the M bits of written data upon the D error detection bits indicating an error, wherein a memory is protected by linear block codes in communication with the memory controller;
• and
• an interface to the memory controller.

A method comprising:

• under control of at least one processor and memory configured with executable instructions that:
• read K bits of a data segment included within a plurality of data segments in memory protected by linear block codes, D error detection bits included within the data segment, and P Parity bits protecting each of the plurality of data segments, wherein K, M and D are positive integers and P is a vector of a set of parity bits;
• determine whether an error is present on the K bits of the data segment according to the D error detection bits;
• read each of the plurality of data segments and execute a correction operation to correct the error upon the D error detection bits indicating an error;
• and
• compute updated P Parity bits for protecting the plurality of data segments.