Bit shuffle processors, methods, systems, and instructions

A processor comprising:

• a plurality of packed data registers;
• a decode unit to decode an instruction, the instruction to indicate a first source operand that is to have at least one lane of bits, and the instruction to indicate a second source packed data operand that is to have a number of sub-lane sized bit selection elements;
• and
• an execution unit coupled with the packed data registers and the decode unit, the execution unit, in response to the instruction, to store a result operand in a destination storage location that is to be indicated by the instruction, the result operand to include, a different corresponding bit for each of the number of sub-lane sized bit selection elements, a value of each bit of the result operand corresponding to a sub-lane sized bit selection element to be that of a bit of a corresponding lane of bits, of the at least one lane of bits of the first source operand, which is indicated by the corresponding sub-lane sized bit selection element.

A system to process instructions comprising:

• an interconnect;
• a processor coupled with the interconnect, the processor to receive an instruction that is to indicate a first source operand that is to have at least one lane of bits, to indicate a second source packed data operand that is to have a number of sub-lane sized bit selection elements, and to indicate a destination storage location, the processor, in response to the instruction, to store a result operand in the destination storage location, the result operand to include a different corresponding bit for each of the number of sub-lane sized bit selection elements, a value of each bit of the result operand corresponding to a sub-lane sized bit selection element to be that of a bit of a corresponding lane of bits, of the at least one lane of bits of the first source operand, which is indicated by the corresponding sub-lane sized bit selection element;
• and
• a dynamic random access memory (DRAM) coupled with the interconnect.