LLVM-Based System C Compiler for Architecture Synthesis

Abstract

A low level virtual machine (LLVM)-based system C compiler for architecture synthesis is provided. In one aspect, a method for translating a system C model to hardware description language (HDL) is provided. The method includes the steps of: generating a hardware connection model (HCM) from the system C model, wherein the HCM defines modules and interconnects in a hardware system; parsing the system C model into a LLVM intermediate representation (IR); converting the LLVM IR to a system LLVM IR which records correspondence information between the LLVM IR and the HCM; and generating the HDL based on direct mapping of processes from the system LLVM IR and the HCM.

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