Method and apparatus for processing sequential writes to portions of an addressible unit
AssigneeIntel Corporation
InventorFrank T. HADY
Life of this patent
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AssigneeIntel Corporation
InventorFrank T. HADY
Estimating the term…
Provided are an apparatus and method for processing sequential writes portions of an addressable unit memory dies to store data. A write to a first portion of an addressable unit is received and the write is written to the first portion of the addressable unit. A next write is received to a next portion of the addressable unit following a previous write to a previous portion of the addressable unit. The next write is written to the next portion of the addressable unit sequentially following the previous portion in response to the next write being sequential with respect to the previous write. Data other than the next write is written to the addressable unit following the previous portion in response to the next write not being sequential with respect to the previous write.
An apparatus, comprising:
An apparatus, comprising:
A method to perform write operations with respect to memory dies of a memory subsystem, comprising:
A method to perform write operations with respect to memory dies of a memory subsystem, comprising:
Dependencies are inferred from the claim text.