Efficient memory bank design
AssigneeQUALCOMM Incorporated
InventorsPriyankar MATHURIA, Rakesh Kumar SINHA, Gururaj SHAMANNA
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AssigneeQUALCOMM Incorporated
InventorsPriyankar MATHURIA, Rakesh Kumar SINHA, Gururaj SHAMANNA
Estimating the term…
In an aspect of the disclosure, a method and an apparatus are provided. The apparatus may be a memory. The memory may include a first memory portion configured to store a first bit and generate a first data bit output. The first data bit output may be a function of the first bit when a first read enable is active. The memory may also include a second memory portion configured to store a second bit and generate a second data bit output. The second data bit output may be a function of the second bit when a second read enable is active. The memory may include a switch configured to select between the first and second bits for a read operation based on the first and second data bit outputs.
A memory, comprising:
A method of accessing memory comprising:
A memory comprising:
Dependencies are inferred from the claim text.