Throttling for a memory system and operating method thereof
AssigneeSK hynix memory solutions inc.
InventorSiarhei Kryvaltsevich
Life of this patent
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Abstract
A semiconductor memory system and an operating method thereof include: a memory device; and a memory controller including a processor, coupled to the memory device, containing instructions executed by the processor, and configured to provide sets of throttling numbers, select a throttling mode, calculate a garbage collection (GC)/HOST ratio based on at least a part of invalid count of garbage collection (GC) blocks and valid count of BGC blocks, and adjust throttling parameters of commands in accordance with the GC/HOST ratio and a number of erased blocks.
Claims20
A semiconductor memory system comprising:
- a memory device;
- and
- a memory controller including a processor, coupled to the memory device, containing instructions executed by the processor, and configured to
- provide sets of throttling parameters,
- select a throttling mode,
- calculate a garbage collection (GC)/HOST ratio based on at least a part of invalid count of GC blocks and valid count of GC blocks, and
- adjust throttling parameters of commands in accordance with the GC/HOST ratio and a number of erased blocks.
An operating method of a semiconductor memory system comprising:
- providing sets of throttling parameters,
- selecting a throttling mode,
- calculating a garbage collection (GC)/HOST ratio based on at least a part of invalid count of GC blocks and valid count of GC blocks, and
- adjusting throttling parameters of commands in accordance with the GC/HOST ratio and a number of erased blocks.
Dependencies are inferred from the claim text.