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US 2017/0285942 A1Published application
Memory system including memory controller and operation method thereof
AssigneeSK hynix Inc.
InventorsHyung-Gyun YANG, Yong-Ju KIM, Hong-Sik KIM
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Abstract
A memory system may include a memory device suitable for storing data requested from a host, and a controller suitable for generating information on the data and transmitting/receiving the data and the information to/from the memory device through first and second data buses, respectively, during a first operation mode, or for transmitting/receiving the data to/from the memory device through one of the first and second data buses based on the data size, during a second operation mode.
Claims20
A memory system comprising:
- a memory device suitable for storing data requested from a host;
- and
- a controller suitable for generating information on the data and transmitting/receiving the data and the information to/from the memory device through first and second data buses, respectively, during a first operation mode, and for transmitting/receiving the data to/from the memory device through one of the first and second data buses based on the data size, during a second operation mode.
A controller comprising:
- a detection unit enabled based on an operation mode and suitable for detecting the size of input data;
- an address generation unit suitable for generating an internal address based on an input address, based on the operation mode and the detection result of the detection unit;
- and
- an ECC processing unit suitable for selectively performing an ECC operation of the data based on the operation mode,
- wherein the controller transmits/receives the data through the first and second data buses or the first data bus, based on the Internal address.
2 more elements
An operation method of a memory system, comprising:
- checking a first or second operation mode based on the logic level of a select signal;
- generating information on data requested from a host, and transmitting/receiving the data and the Information to/from a memory device through first and second data buses, respectively, during the first operation mode based on the check result;
- and
- detecting the data size and transmitting/receiving the data to/from the memory device through one of the first and second data buses based on the detection result, during the second operation mode based on the check result.
1 more element
Dependencies are inferred from the claim text.