Memory apparatus and energy-saving control method thereof

A memory apparatus comprising:

• a plurality of non-volatile memory units;
• and
• a control chip coupled to the non-volatile memory units and coupled to a host computer via a signal transmission interface, the control chip comprising:
• a specific circuit group coupled to a clock generation unit;
• a memory control unit coupled to the clock generation unit and the non-volatile memory units to control an access to the non-volatile memory units;
• and
• an energy-saving control unit coupled to the clock generation unit, the specific circuit group, and the memory control unit, wherein in a normal mode and during a period of accessing the non-volatile memory units by the control chip, if the non-volatile memory units are in a busy state, the energy-saving control unit controls the clock generation unit to stop outputting an internal clock signal to the specific circuit group, so as to reduce power consumption of the control chip.