Un-sampled decision feedback equalizer including configurable loop delay

An electronic system comprising:

• conductive lines on a circuit board;
• a memory device coupled to the conductive lines;
• and
• a processor coupled to the conductive lines, the processor including:
• a first circuit to receive an input signal and generate an equalized signal to a node;
• a second circuit to amplify the equalized signal and generate digital input information;
• a delay circuit including delay elements to apply a time delay to the digital input information and generate digital output information, and a selector to provide feedback information from an output node of one of the delay elements;
• and
• an adjust circuit including switches on circuit paths coupled to the node, the adjust circuit to control the switches based on the feedback information.