Bandgap reference circuit with capacitive bias
AssigneeIntel Corporation
InventorMatthias EBERLEIN
Life of this patent
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Abstract
An apparatus is described having a reference voltage circuit. The reference voltage circuit includes a diode to receive first and second currents having first and second respective current densities, where, the first and second current densities are different and determined by circuitry that precisely controls the respective amount of time the first and second currents flow into the diode. The reference voltage circuit also comprises circuitry to form a reference voltage by combining first and second voltages generated from respective voltages of the diode that result from the first and second currents flowing through the diode.
Claims20
An apparatus, comprising:
- a reference voltage circuit comprising:
- a diode to receive first and second currents having first and second respective current densities, where, the first and second current densities are different and determined by circuitry that precisely controls the respective amount of time the first and second currents flow into the diode, a first amount of time during which the first current is allowed to flow into the diode being different than a second amount of time during which the second current is allowed to flow into the diode and wherein a first time period exists in which both the first and second currents flow into the diode and a second time period exists in which one but not the other of the first and second currents flow into the diode;
- wherein the reference voltage circuit comprises circuitry to form a reference voltage by combining first and second voltages generated from respective voltages of the diode, the first voltage resulting from the first current flowing through the diode, the second voltage resulting from the second current flowing through the diode.
An apparatus, comprising:
- a bandgap reference voltage circuit having a PTAT voltage generated from a current density ratio greater than 150.
A computing system, comprising:
- a plurality of processing cores;
- a memory controller coupled to the processing cores;
- a system memory coupled to the memory controller;
- an interface circuit, said interface circuit comprising a reference voltage circuit, said reference voltage circuit comprising:
- a reference voltage circuit comprising:
- a diode to receive first and second currents having first and second respective current densities, where, the first and second current densities are different and determined by circuitry that precisely controls the respective amount of time the first and second currents flow into the diode, a first amount of time during which the first current is allowed to flow into the diode being different than a second amount of time during which the second current is allowed to flow into the diode and wherein a first time period exists in which both the first and second currents flow into the diode and a second time period exists in which one but not the other of the first and second currents flow into the diode;
- wherein the reference voltage circuit comprises circuitry to form a reference voltage by combining first and second voltages generated from respective voltages of the diode, the first voltage resulting from the first current flowing through the diode, the second voltage resulting from the second current flowing through the diode.
Dependencies are inferred from the claim text.