Array substrate and semiconductor device containing the same, and method for fabricating the same
AssigneesBoe Technology Group Co., Ltd., Hefei Xinsheng Optoelectronics Technology Co., Ltd.
InventorJideng ZHOU
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Abstract
The present disclosure provides an array substrate. The array substrate includes a substrate having a display region with a plurality of pixel regions, each pixel region having two or more first regions; a common electrode line between two adjacent pixel regions; a gate line; a data line intersecting with the gate line; at least one of the gate line and the data line being in a second region between two adjacent first regions; and a pixel electrode having a hollowed-out pattern within a corresponding first region, pixel electrodes corresponding to the two or more first regions being a pixel electrode unit.
Claims21
1-20. (canceled)
An array substrate, comprising:
- a substrate having a display region with a plurality of pixel regions, each pixel region having two or more first regions;
- a common electrode line between two adjacent pixel regions;
- a gate line;
- a data line intersecting with the gate line;
- at least one of the gate line and the data line being in a second region between two adjacent first regions;
- and
- a pixel electrode having a hollowed-out pattern within a corresponding first region, pixel electrodes corresponding to the two or more first regions being a pixel electrode unit.
A method for fabricating an array substrate, comprising:
- providing a substrate having a display region with a plurality of pixel regions, each pixel region having two or more first regions, and a second region between two adjacent first regions;
- forming a gate line and a gate electrode of a thin-film transistor on a substrate, the gate line and the gate electrode of the thin-film transistor being formed in a same fabrication step;
- forming a first insulating layer;
- forming an active layer of the thin-film transistor, the active layer being located in an area where the gate line and a data line intersect;
- forming a data line, common electrode lines between two adjacent pixel regions, first electrodes, and a second electrode, at least one of the gate line and the data line being formed in the second region;
- forming a second insulating layer and first via holes, the first via holes being through the second insulating layer;
- and
- forming a pixel electrode with a hollowed-out pattern in the pixel region being connected to the first electrodes through the first via holes, the hollowed-out pattern corresponding to the first region.
Dependencies are inferred from the claim text.