Method and system for predicting high-temperature operating life of sram devices

An apparatus for predicting high-temperature operating life of an integrated circuit (IC) comprising a plurality of first devices, the apparatus comprising:

• a first test unit configured to perform bias temperature instability tests on a first device of the plurality of first devices and high-temperature operating life tests of the IC;
• an analyzing unit configured to establish a relationship between the first device's bias temperature instability and the IC's high-temperature operating life based on a result of the bias temperature instability tests and the high-temperature operating life tests;
• a second test unit configured to perform wafer-level bias temperature instability tests on a second device of a lot of subsequent integrated circuits (ICs) each comprising a plurality of second devices;
• and
• a prediction unit configured to predict high-temperature operating life of the subsequent ICs based on a result of the wafer-level bias temperature instability tests and the relationship between the first device's bias temperature instability and the IC's high-temperature operating life.