Communication circuit chip and electronic device configuredto decode data with reference to reception characteristic analyzed based on start-of-frame pattern

A communication circuit chip comprising:

• a start pattern detector configured to detect a first data pattern included in a start-of-frame (SOF) marker that indicates start of reception data, the reception data being received through an antenna;
• a characteristic analyzer configured to analyze a reception characteristic of the antenna based on phase differences between a phase of a reference clock and phases of a second data pattern following the first data pattern in the SOF marker;
• and
• a decoder configured to generate, with reference to the analyzed reception characteristic, a digital value that corresponds to a phase difference between the phase of the reference clock and a phase of encoded data following the SOF marker in the reception data.

A very-high bitrate (VHBR) communication receiver comprising:

• a phase-to-digital converter circuit that converts first, second, and third symbols received, from a communication transmitter, through an antenna into first, second, and third conversion values, respectively;
• a subtraction circuit that subtracts the first conversion value from the second conversion value to generate a first difference value;
• a processing circuit that identifies a characteristic of a communication channel between the communication transmitter and the antenna based on the first difference value;
• and
• a decoder circuit that modifies decoding of the third conversion value into third data based upon the identified characteristic, wherein
• the third data represents information communicated by the communication transmitter and received by the phase-to-digital converter as a third symbol.