Technologies for correcting flipped bits for an error correction decode process
AssigneeIntel Corporation
InventorZion S. Kwok
Life of this patent
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AssigneeIntel Corporation
InventorZion S. Kwok
Estimating the term…
Technologies for correcting flipped bits prior to performing an error correction decode process include an apparatus that includes a memory to store a redundant set of codewords and a controller to read data from the memory. The controller selects a codeword from the redundant set of codewords to read from the memory, analyzes the selected codewords to determine whether the codeword contains uncorrectable errors, reads remaining codewords in the redundant set that correspond to the selected codeword, combines the remaining codewords together to generate a rebuilt codeword, flips bits in sections of the rebuilt codeword that differ from the selected codeword by a threshold amount, and performs an error correction decode process based on the rebuilt codeword.
An apparatus comprising:
One or more machine-readable storage media comprising a plurality of instructions stored thereon that, when executed, cause an apparatus to:
A method comprising:
Dependencies are inferred from the claim text.