Method for robust phase-locked loop design

An apparatus, comprising:

• a first phase rotation circuit configured to select an output signal from a plurality of phase-shifted signals derived from a base clock signal, each of the plurality of phase-shifted signals having a phase shift with respect to a base clock signal that is unique within the plurality of phase-shifted signals;
• a first control word generator adapted to produce phase control words that select an output signal from the plurality of phase-shifted signals as an output signal;
• and
• a timing control circuit adapted to provide a first control word produced by the first control word generator to the first phase rotation circuit after a delay when the first control word is configured to change the output signal by selecting a first signal that has a closer phase relationship with a reference signal than the output signal,
• wherein the delay prevents the timing control circuit from providing the first control word to the first phase rotation circuit while either of the first signal and the output signal is in a first signaling state.

A clock generation apparatus, comprising:

• means for generating a plurality of phase-shifted signals, each of the plurality of phase-shifted signals having a phase shift with respect to a base clock signal that is unique within the plurality of phase-shifted signals;
• means for selecting an output signal from the plurality of phase-shifted signals, wherein a first signal in the plurality of phase-shifted signals is initially selected as the output signal;
• and
• means for generating phase control words, wherein the means for generating phase control words is configured to generate a first phase control word that indicates a second signal in the plurality of phase-shifted signals when the second signal has a closer phase relationship with a reference signal than the first signal,
• wherein the means for selecting the output signal from the plurality of phase-shifted signals is configured to:
• refrain from selecting the second signal as the output signal while either of the first signal and the second signal is in a first signaling state;
• and
• select the second signal as the output signal when the first signal and the second signal are in a second signaling state.