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US 2017/0257101 A1Published application
Configurable Gate Array Based on Three-Dimensional Writable Memory
AssigneeHangZhou HaiCun Information Technology Co., Ltd.
InventorGuobiao ZHANG
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Abstract
The present invention discloses a configurable gate array based on three-dimensional printed memory (3D-W). It comprises an array of configurable computing elements, an array of configurable logic elements and an array of configurable interconnects. Each configurable computing element comprises at least a 3D-W array, which is electrically programmable and can be loaded with a look-up table (LUT) for a math function.
Claims20
A configurable gate array, comprising:
- at least a configurable logic element formed on a semiconductor substrate, wherein said configurable logic element selectively realizes a logic function from a logic library;
- and
- at least a first portion of a first configurable computing element formed in a first three-dimensional writable memory (3D-W) array stacked above said semiconductor substrate, wherein said first 3D-W array is electrically programmable and can be loaded with a first look-up table (LUT) for a first math function.
A configurable gate array, comprising:
- at least a configurable interconnect formed on a semiconductor substrate, wherein said configurable interconnect selectively realizes an interconnect from an interconnect library;
- and
- at least a first portion of a first configurable computing element formed in a first three-dimensional writable memory (3D-W) array stacked above said semiconductor substrate, wherein said first 3D-W array is electrically programmable and can be loaded with a first look-up table (LUT) for a first math function.
A configurable gate array, comprising:
- an array of configurable computing elements including a configurable computing element, wherein said configurable computing element is electrically programmable and can be loaded with a look-up table (LUT) for a math function;
- an array of configurable logic elements including a configurable logic element, wherein said configurable logic element selectively realizes a logic function from a logic library;
- an array of configurable interconnects including a configurable interconnect, wherein said array of configurable interconnects couple said array of configurable computing elements with said array of configurable logic elements;
- wherein said configurable gate array realizes a complex math function by programming said array of configurable computing elements, said array of configurable logic elements and said array of configurable interconnects.
1 more element
Dependencies are inferred from the claim text.