Multi-impedance rectification for wireless power transfer

A rectification apparatus, the apparatus comprising:

• a rectifier circuit comprising a plurality of switches, the rectifier circuit configured to output a DC output voltage based on an AC input voltage waveform;
• and
• a controller circuit electrically connected to the rectifier circuit and configured to:
• drive the plurality of switches to cause the rectifier circuit to be configured in a first mode as a voltage doubler circuit in response to a voltage level of the input voltage waveform being below a reference voltage;
• and
• drive the plurality of switches to cause the rectifier circuit to be configured in a second mode, different than the first mode, in response to the voltage level of the input voltage waveform being above the reference voltage.

A rectification circuit, comprising:

• a control signal circuit configured to output a plurality of control signals, including a first control signal of a first clock signal, a second control signal of a second clock signal, wherein the first clock signal and the second clock signal are non-overlapping and both have a frequency substantially equal to a frequency of an input waveform, the control circuit further configured to output a third control signal and a fourth control signal;
• the control signal circuit configured to cause the third control signal to be maintained at a non-clocked high level in response to an input waveform amplitude being less than a reference level and configured to cause the third control signal to be a third clock signal having a frequency substantially equal to a frequency of the input waveform in response to the input waveform amplitude being greater than the reference level;
• the control signal circuit further configured to cause the fourth control signal to be maintained at a non-clocked low level in response to the input waveform amplitude being less than the reference level and configured to cause the fourth control signal to be a fourth clock signal having a frequency substantially equal to a frequency of the input waveform, wherein the third clock signal and the fourth clock signal are non-overlapping;
• and
• a synchronous rectifier electrically connected to receive the input waveform and generate therefrom a first output voltage, including:
• a) a front set of switches electrically connected to receive the input waveform, the first control signal, and the second control signal;
• and
• b) a back set of switches electrically connected to the front set of switches, the third control signal and the fourth control signal, and configured to output the first output voltage from a first output node.

A method of providing a DC output voltage from an AC input voltage waveform, the method comprising:

• rectifying the AC input voltage waveform to output the DC output voltage via a rectifier circuit comprising a plurality of switches;
• altering one or more control signals of the plurality of switches to cause the rectifier circuit to be configured in a first mode as a voltage doubler circuit in response to a voltage level of the input voltage waveform being below a reference voltage;
• and
• altering the one or more control signals of the plurality of switches to cause the rectifier circuit to be configured in a second mode, different than the first mode, in response to the voltage level of the input voltage waveform being above the reference voltage.