Semiconductor Memory Devices

A semiconductor memory device, comprising:

• a substrate including a peripheral circuit region and a ground region spaced apart from the peripheral circuit region, the ground region corresponding to a portion of an edge of the substrate;
• an impurity region in the ground region of the substrate;
• an interlayer dielectric layer on the substrate and exposing the impurity region;
• a silicon structure including a first portion in the interlayer dielectric layer and in contact with the impurity region and a second portion extending from the first portion onto a top surface of the interlayer dielectric layer, the silicon structure being electrically connected to the substrate;
• and
• a cell array structure on the second portion of the silicon structure.

A semiconductor memory device, comprising:

• a first substrate;
• an impurity region in the first substrate;
• an interlayer dielectric layer on the first substrate;
• a second substrate on the interlayer dielectric layer;
• a cell array region on the second substrate that overlaps the impurity region;
• and
• a via that penetrates the interlayer dielectric layer so as to electrically connect the second substrate to the first substrate.