Electrostatic discharge protection device

A device, comprising:

• a substrate;
• a transistor structure on the substrate, the transistor structure including a source region, a drain region, and a gate region between the source region and the drain region, the gate region including a gate electrode on an insulating layer;
• a capacitive structure on the substrate, the capacitive structure including an electrode pattern aligned with the drain region;
• a resistive structure on the substrate, the resistive structure being aligned with the source region;
• and
• a connection structure electrically connecting the transistor structure, the capacitive structure, and the resistive structure to one another,
• wherein the capacitive structure comprises the electrode pattern as a first electrode of the capacitive structure and the drain region as a second electrode of the capacitive structure.

A device, comprising:

• a substrate;
• a transistor structure on the substrate, the transistor structure including a source region, a drain region, and a gate region between the source region and the drain region, the gate region including a gate electrode on an insulating layer;
• a capacitive structure on the substrate, the capacitive structure including an electrode pattern disposed on the drain region;
• a resistive structure on the substrate, the resistive structure being disposed on the source region;
• and
• a connection structure electrically connecting the transistor structure, the capacitive structure, and the resistive structure to one another,
• wherein top surfaces of the gate electrode, the electrode pattern of the capacitor, and the resistor are coplanar with each other.