Wafer Level Shielding in Multi-Stacked Fan Out Packages and Methods of Forming Same

A device package comprising:

• a first package tier comprising:
• a first device die;
• a first molding compound extending along sidewalls of the first device die;
• first conductive through inter-vias (TIVs) extending through the first molding compound;
• and
• first fan-out redistribution layers (RDLs) over the first package tier;
• a second package tier over the first fan-out RDLs, the second package tier comprising:
• a second device die;
• a second molding compound extending along sidewalls of the second device die;
• and
• second conductive TIVs extending through the second molding compound;
• and
• an electromagnetic interference (EMI) shield disposed over and extending along sidewalls of the second package tier, wherein the EMI shield contacts the second conductive TIVs, and wherein the first conductive TIVs, the first fan-out RDLs, and the second conductive TIVs electrically connect the EMI shield to ground.

A package comprising:

• a first device die encapsulated in a first molding compound;
• a first through via extending through the first molding compound;
• a first redistribution layer electrically connected to the first device die and the first through via;
• and
• an electromagnetic interference (EMI) shield contacting the first through via, wherein the first through via and the first redistribution layer electrically ground the EMI shield, and wherein the EMI shield comprises:
• a first region on a side of the first device die opposite the first redistribution layer;
• and
• a second region extending along the first molding compound.