Resistive random access memory and write operation method thereof
OwnerYinyin LIN, Jianguo YANGinventors
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Abstract
The present invention relates to resistive random access memory (ReRAM). Disclosed are a ReRAM and write operation method thereof. The write operation method comprises monitoring, under a pre-operation signal bias, whether a conversion from a high resistance stage (HRS)/low resistance stage (LRS) to a LRS/HRS begins to occur, and controlling a change in a conversion operation signal, thus conducting a setting/resetting operation. The write operation method improves the storage performance of the ReRAM.
Claims40
A resistive random access memory, comprising:
- a write operation signal generation module for at least generating a pre-operation signal of a set/reset operation signal and a conversion operation signal whose voltage is decreased/increased gradually;
- and
- a conversion initiation monitoring module for determining whether an initiation of a conversion from a high resistance state/low resistance state to the low resistance state/high resistance state has happened in a storage unit of the resistive random access memory biased with the pre-operation signal, and outputting a first feedback signal (FB1) when the initiation of a conversion from a high resistance state/low resistance state to the low resistance state/high resistance state has happened;
- wherein the write operation signal generation module generates the conversion operation signal based on the first feedback signal (FB1) and biases the conversion operation signal onto the storage unit so as to keep performing a set/reset operation process from the high resistance state/low resistance state to the low resistance state/high resistance state.
A write operation method of resistive random access memory, comprising the following steps during a set/reset operation process:
- biasing a pre-operation signal of a set/reset operation signal onto a storage unit of the resistive random access memory;
- determining whether an initiation of a conversion from a high resistance state/low resistance state to the low resistance state/high resistance state has happened, and outputting a first feedback signal (FB1) if it is determined “yes”;
- and
- generating a conversion operation signal whose voltage is decreased/increased gradually based on the first feedback signal (FB1), and biasing the conversion operation signal onto the storage unit so as to keep performing a set/reset operation process from the high resistance state/low resistance state to the low resistance state/high resistance state.
A resistive random access memory, comprising:
- a write operation signal generation module which is used for at least generating a pre-operation signal whose voltage is increased gradually of a reset operation signal, and a conversion operation signal of the reset operation signal;
- and
- a conversion initiation monitoring module for determining whether an initiation of a conversion from a low resistance state to a high resistance state has happened in a storage unit of the resistive random access memory biased with the pre-operation signal, and outputting a first feedback signal when the initiation of a conversion from a low resistance state to the high resistance state has happened;
- wherein the write operation signal generation module terminates an increasing process of the pre-operation signal based on the first feedback signal and substantially maintains the output electrical level so as to generate the conversion operation signal, and biases the conversion operation signal onto the storage unit so as to keep performing the reset operation process from the low resistance state to the high resistance state.
A write operation method of resistive random access memory, comprising the following steps during a reset operation process:
- biasing a pre-operation signal of a reset operation signal onto a storage unit of the resistive random access memory, wherein the voltage of the pre-operation signal is increased gradually;
- determining whether an initiation of a conversion from a low resistance state to a high resistance state has happened, and outputting a first feedback signal if it is determined “yes”;
- and
- terminating an increasing process of the pre-operation signal based on the first feedback signal and substantially maintaining the output electrical level so as to generate the conversion operation signal, and biasing the conversion operation signal onto the storage unit so as to keep performing the reset operation process from the low resistance state to the high resistance state.
Dependencies are inferred from the claim text.