Ground reference scheme for a memory cell

An electronic memory apparatus, comprising:

• a ferroelectric memory cell that comprises a ferroelectric capacitor in electronic communication with a digit line;
• and
• a controller in electronic communication with the ferroelectric memory cell and operable to:
• connect a positive voltage source to the ferroelectric capacitor;
• and
• connect a negative voltage source to the ferroelectric capacitor after a voltage of the digit line reaches a threshold.

An electronic memory apparatus, comprising:

• a ferroelectric memory cell that comprises a ferroelectric capacitor in electronic communication with a digit line and a first selection component;
• a reference capacitor in electronic communication with the digit line via a second selection component;
• and
• a controller in electronic communication with the first selection component, the second selection component, wherein the controller is operable to:
• connect a first voltage source to the ferroelectric capacitor;
• and
• connect a second voltage source to the reference capacitor, wherein an output of the second voltage source is an inverse of an output of the first voltage source.