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US 2017/0256293 A1Published application
Sensing buffer, peripheral circuit, and/or memory device
AssigneeSK hynix Inc.
InventorYoung Sub YUK
Life of this patent
Estimating the term…
Abstract
A sensing buffer, or peripheral circuit or memory device may be provided. The sensing buffer may be configured to maintain a predetermined current according to a first current regardless of an external power supply and/or a temperature.
Claims20
A sensing buffer, comprising:
- a first input circuit coupled between an external power supply and a ground voltage and configured to generate a first current according to a reference voltage;
- a first mirror circuit configured to maintain a predetermined current of a first node according to the first current regardless of the external power supply and a temperature applied to the sensing buffer;
- a second input circuit including a second node coupled to the first node, wherein a predetermined current of a third node is based on a sensing voltage and the current of the first and second nodes;
- and
- a resistor coupled between the first and second nodes and configured to maintain a predetermined current between the first and second input circuits.
2 more elements
(canceled)
A sensing buffer, comprising:
- a first input circuit coupled between an external power supply and a ground voltage and configured for generating a first current based on a reference voltage;
- a second input circuit coupled between the external power supply and the ground voltage and configured for generating a second current based on a sensing voltage;
- a first mirror circuit configured for operating in a saturation state between the first and second input circuits to maintain a predetermined current flowing through a first node and a second node;
- a second mirror circuit coupled to the ground voltage between the first and second input circuits and configured for generating a current path along with the first mirror circuit;
- a first boosting circuit coupled between the external power supply and the ground voltage and configured for boosting a current based on a potential of a third node coupled to the first node;
- and
- a second boosting circuit coupled between the external power supply and the ground voltage and configured for boosting the current based on a potential of a fourth node coupled to the second node.
4 more elements
A memory device, comprising:
- a memory cell array configured for storing data;
- a page buffer unit coupled to the memory cell array through bit lines and configured for sensing a current or a voltage of the bit lines;
- and
- a sensing buffer configured for generating a sensing voltage and applying the sensing voltage to the page buffer unit, wherein the sensing buffer includes switches included in a feedback current loop, and
- wherein the switches are operated in a saturation state based on a plurality of current paths.
2 more elements
Dependencies are inferred from the claim text.