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US 2017/0255834 A1Published application
Distributed Pattern Processor Comprising Three-Dimensional Memory Array
AssigneeHangZhou HaiCun Information Technology Co., Ltd.
InventorGuobiao ZHANG
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Abstract
The present invention discloses a distributed pattern processor. The distributed pattern processor not only stores patterns permanently, but also processes them using massive parallelism. It comprises a plurality of storage-processing units (SPU), with each SPU comprising a pattern-processing circuit and at least a three-dimensional memory (3D-M) array storing at least a pattern. The 3D-M array is vertically stacked above the pattern-processing circuit.
Claims20
A distributed pattern processor, comprising:
- an input bus for transferring a first pattern;
- a semiconductor substrate having transistors thereon;
- a plurality of storage-processing units (SPU) including a first SPU, said first SPU comprising at least a three-dimensional memory (3D-M) array and a pattern-processing circuit, wherein
- said 3D-M array is stacked above said substrate, said 3D-M array storing a second pattern;
- said pattern-processing circuit is formed on said substrate, said pattern-processing circuit performing pattern matching or pattern recognition for said first and second patterns;
- said 3D-M array and said pattern-processing circuit are communicatively coupled by an inter-level connection comprising a plurality of contact vias.
3 more elements
Dependencies are inferred from the claim text.