Data transfer apparatus and data transfer system
AssigneeKabushiki Kaisha Toshiba
InventorsSeiji Maeda, Hiroyuki Usui
Life of this patent
Estimating the term…
Abstract
A data transfer apparatus according to an embodiment includes: a first main memory configured to store first data to be used by a first processor; a first hash table in which a hash value and address information of the first data stored in the first main memory are registered; and a data transfer unit configured to transfer data having a hash value not registered in the first hash table from among second data stored in a second main memory from the second main memory to the first main memory.
Claims20
A data transfer apparatus comprising:
- a first main memory configured to store first data to be used by a first processor;
- a first hash table in which a hash value and address information of the first data stored in the first main memory are registered;
- and
- a data transfer unit configured to transfer data having a hash value not registered in the first hash table from among second data stored in a second main memory from the second main memory to the first main memory.
A data transfer apparatus comprising:
- a first cache memory configured to temporarily store first data to be used by a first processor;
- a first main memory configured to store the first data;
- a first hash table in which a hash value and address information of the first data stored in the first main memory are registered;
- and
- a data transfer unit configured to transfer data having a hash value not registered in the first hash table from among second data stored in a second main memory from the second main memory to at least one of the first main memory and the first cache memory.
A data transfer system comprising:
- a first processor;
- a first main memory configured to store first data to be used by the first processor;
- a first hash table in which a hash value and address information of the first data stored in the first main memory are registered;
- a second processor;
- a second main memory configured to store second data to be used by the second processor;
- and
- a data transfer unit configured to transfer data having a hash value not registered in the first hash table from among the second data from the second main memory to the first main memory via an interconnect.
Dependencies are inferred from the claim text.