Cache memory device and operating method thereof
AssigneeElectronics and Telecommunications Research Institute
InventorsJin Ho HAN, Young-Su KWON, Kyoung Seon SHIN, Kyung Jin BYUN, Nak Woong EUM
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AssigneeElectronics and Telecommunications Research Institute
InventorsJin Ho HAN, Young-Su KWON, Kyoung Seon SHIN, Kyung Jin BYUN, Nak Woong EUM
Estimating the term…
Provided is an operating method of a cache memory device includes receiving an address from an external device, reading an entry corresponding to at least a portion of the received address among a plurality of entries that are included in the cache memory, performing error detection on additional information that is included in the read entry, and performing a recovery operation on the entry based on a result of error detection and the additional information. The entry includes the additional information and a cache line corresponding to the additional information, and the additional information includes a tag, valid bit, and dirty bit that correspond to the cache line.
An operating method of a cache memory device comprising:
A cache memory device comprising:
Dependencies are inferred from the claim text.