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US 2017/0255467 A1Published application
Apparatus for Information Processing with Loop Cache and Associated Methods
AssigneeSilicon Laboratories Inc.
InventorsMark W. Johnson, Paul Zavalney, Marius Grannæs, Oeivind A. G. Loe
Life of this patent
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Abstract
An apparatus includes a processor and a loop cache coupled to the processor. The loop cache provides to the processor instructions corresponding to a loop in the instructions. The loop cache includes a persistence counter.
Claims20
An apparatus comprising:
- a processor to execute instructions;
- and
- a loop cache coupled to the processor to provide to the processor instructions corresponding to a loop in the instructions, the loop cache comprising a persistence counter.
A microcontroller unit (MCU) comprising:
- a processor to receive and execute a set of instructions;
- a loop cache, comprising:
- a storage circuit to store instructions corresponding to a loop in the set of instructions;
- and
- a persistence counter to count down from a persistence factor.
2 more elements
A method of processing information, the method comprising:
- executing instructions using a processor;
- using a loop cache to provide to the processor instructions corresponding to a loop in the instructions by using a persistence counter.
Dependencies are inferred from the claim text.