Nonvolatile semiconductor memory device

A nonvolatile semiconductor memory device, comprising:

• a memory cell array that includes a plurality of memory cells, each of which can programmed to have one of a first threshold voltage and a second threshold voltage;
• a word line connected to the plurality of memory cells;
• and
• a controller configured to:
• perform a first read sequence comprising applying a series of different voltage levels to the word line to read data from the memory cell array at each different voltage level and storing the data read from the memory cell array in a cache, and
• perform a second read sequence comprising applying a read level voltage to the word line and reading data stored in the memory cell array at a target address and outputting the data from the target address, wherein
• the read level voltage is set based on the data read from memory cell array in the first read sequence.

A NAND-type memory device, comprising:

• a memory cell array including memory cells in which data can be stored by programming a threshold voltage for one of more memory cells in the memory cell array;
• and
• a controller configured to:
• perform an optimum value search read on at least a portion of the memory cell array, the optimum value search read including data read operations on at least the portion of the memory cell at a series of different voltage levels, and
• perform an optimum value read on at least a targeted portion of the memory cell array, the optimum value read including a data read operation at a read voltage level set according to results from the data read operations in the optimum value search read.